Important features

• Support 802.11a, 802.11b, 802.11g, Hiperlan2, 802.16a and DVB Viterbi Decoding
• High Speed (70MHz in 0.35um technology)  
• 4bits or 3bits soft decision and 1bit hard decision inputs
• Small gate count (43Kgates and 2x128x64 bits memory)
• Trace length programmable from 16 to 112
• Support generators G[133,171],G[171,133] and G[133,175]
• Support puncture rates 1/2, 2/3, 3/4, 5/6, 7/8 and 9/16
• Straight forward interface for system integration
• Can be mapped to FPGA and run in real time

Top level interface

 

 

 

 

Applications

Wireless LANs(802.11a,b,g, 802.16a and  Hiperland2), Digital Video/Radio Broadcasting (DVB-S and DVB-T) and Satellite Communications.

Deliverables

Simulation database, FPGA netlist or synthesisable verilog code for ASIC implementation.  

Please email info@SiliconOcean.com  for more information