Silicon Ocean Ultra Low Power MP3/WMA Decoder ASIC Core (MP3WMA-SO3)

The MP3WMA-SO3 decoder ASIC core is designed for ultra low power MP3/WMA decoding applications.  The MP3WMA-SO3 is silicon proven. 

 

1.   Important Features

 

·     All MP3/WMA decoding functions implemented at RTL level

·     Gate count 105 K gates plus 22K bytes data RAM

·     Lowest power consumption (clock required 9 MHz)

·     Single clock synchronous design

·     Support ISO11172-3, ISO13818-3 layer3 and WMA audio decoding

·     Straightforward interfaces for SoC applications

·     Ten-bands equalizer with 64 steps for -20 to 20 dB gain

·     Thirty-two steps volume control

·     Fully synthesizable technology independent of verilog RTL code

 

2. Function Overview

 

MP3WMA-SO3 takes any MP3/WMA bitstream, automatically detects the header and extracts all header/side information, and then uses the information to decode compressed MP3/WMA bit stream. The output from the MP3WMA-SO3 is 16 bits PCM samples. These PCM samples can be transferred to audio DAC via I2S bus or through a rate converter to a low cost fixed sample rate audio DAC.

 

3. MP3WMA-SO3 top level interface

 

 

 

 

 

 

 

Deliverables

 

·      Synthesizable verilog source code

·      Verilog testbench

 

 

Please email info@SiliconOcean.com for more information